1. Field of the Invention:
The present invention relates to semiconductor switching devices and more particularly to silicon transistor devices.
2. Description of the Prior Art:
Transistor devices of the prior art have a general structural configuration shown in FIG. 1 wherein a body of semiconductor material in the form of a wafer 10 is doped to provide three alternate semiconductivity zones. Such a device is commonly referred to in the art as a single diffused device.
A collector zone 12 of N-type semiconductivity extends from one major surface 11 of the wafer 10 into the semiconductor material to meet a base zone 14 of P-type semiconductivity. PN junction 13 is formed at the interface of zones 12 and 14. Zone 14 extends from PN junction 13 to emitter zone 16 of N-type semiconductivity where PN junction 15 is formed. A cavity is etched in the center of the wafer 10 to a depth which penetrates PN junction 15 terminating in surface 17. Base electrode 18 is affixed to and makes good electrical contact with base zone 14 along a portion of recessed surface 17. An emitter electrode 20 is affixed to and makes good contact with emitter zone 16 at major surface 19. The electrodes 18 and 20 may be provided, for example, by aluminum deposition in a known manner. A supporting collector electrode 22 is affixed to major surface 11 to provide good electrical and thermal contact to collector zone 12 as well as to provide mechanical support for the wafer 10. Typical examples of metals used for the electrode 22 are molybdenum and tungsten, which are preferred for their favorable expansion properties. The wafer 10 has a beveled edge 23 produced in a known manner. Disposed on the beveled edge 23 is an insulating and protective coating 24. The coating composition and manner of application are known in the art, a high temperature curing silicone varnish being an example of a suitable coating material.
It has been found that prior art transistor device 99, shown in FIG. 1, has a limited collector-base blocking voltage capability. The present invention provides a transistor device which achieves a higher collector-base blocking voltage than prior art device 99 while at the same time improving high current gain.